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APW6020
Advanced Dual PWM and Dual Linear Power Controllers
Features *
4 Regulated Voltages are provided
General Description
The APW6020 provides the power control and protection for four output voltages in high-performance , graphics intensive microprocessor and computer applications. The IC integrates two voltage-mode PWM controllers and two linear controllers , as well as the monitoring and protection functions into a single package. One PWM controller regulates the microprocessor core voltage with a synchronous-rectified buck converter. The second PWM controller supplies the computer's AGP 1.5V or 3.3V bus power with a standard Buck converter. The linear controllers requlate the power for the 1.5V GTL bus , and the 1.8V power for the North/South Bridge core voltage and/or cache memory circuits. The APW6020 includes an Intel-compatible , TTL 5-input digital-toanalog converter (DAC) that adjusts the core PWM output voltage from 1.3 VDC to 2.05 VDC in 0.05V steps and from 2.1 VDC to 3.5 VDC in 0.1V increments. The precision reference and voltage-mode control provide 1% static regulation. The second PWM controller's output is user-selectable , through a TTL-compatible signal applied at the SELECT pin , for levels of 1.5V or 3.3V with 3% accuracy. The two linear regulators provide fixed output voltages of 1.5V 3% (VOUT3 ) and 1.8V3% (VOUT4 ). The APW6020 monitors all the output voltages. A single Power Good signal is issued when the core is within 10% of the DAC setting and all other outputs are above their under-voltage levels. Additional builtin over-voltage protection for the core output uses the lower MOSFET to prevent output voltages above 115% of the DAC setting. The PWM controller's overcurrent function monitors the output current by using the voltage drop across the upper MOSFET's rDS(ON) .
- Microprocessor Core (1.3V to 3.5V) - AGP Bus (1.5V or 3.3V) - Memory (1.8V) , GTL Bus (1.5V)
* *
Simple Single-Loop Control Designs Voltage-Mode PWM Control Fast PWM Converter Transient Response High-Bandwidth Error Amplifiers
- Full 0% to 100% Duty Ratios
*
Excellent Output Voltage Regulation
- Core PWM Output : 1% Over Temperature - Other Outputs : 3% Over Temperature
*
TTL-Compatible 5- Bit DAC Microprocessor Core Output Voltage Selection
* * *
- Wide Range - 1.3VDC to 3.5 VDC
Power-Good Output Voltage Monitor Over-Voltage and Over-Current Fault Monitors Small Converter Size
- Constant Frequency Operation - 200kHz Free-Running Oscillator ; Programmable From 50kHz to Over 800kHz
- Small External Component Count
Applications *
Motherboard Power Regulation for Computers
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A.2 - May, 2001 1 www.anpec.com.tw
APW6020
Pin Description
UGATE2 PHASE2 VID4 VID3 VID2 VID1 VID0 PGOOD OCSET2 VSEN2 SELECT SS FAULT/ RT VSEN4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC UGATE1 PHASE1 LGATE1 PGND OCSET1 VSEN1 FB1 COMP1 VSEN3 DRIVE3 GND VAUX DRIVE4
Ordering Information
APW6020
Handling Code Temp. Range Package Code Package Code K : SOP - 28 Temp. Range C : 0 to 70 C Handling Code TU : Tube
TR : Tape & Reel
Block Diagram
VSEN3 OCSET2 VSEN1 OCSET1 VCC
VCC
DRIVE3
DRIVE4
VSEN4 UGATE2
VCC DRIVE2
PHASE2
INHIBIT PWM COMP2
PWM2
VSEN2
ERROR AMP2
+ OSCILLATOR x 0.75 1.5V or 3.3V
SELECT
Copyright ANPEC Electronics Corp. Rev. A.2 - May, 2001
+
-
GATE CONTROL
+
-
+ x 0.75
+ + 1.26V 200A LINEAR UNDERVOLTAGE
x 1.10 LUV
Power-on Reset (POR)
VAUX
+ x 0.90
200A
+ -
+ PGOOD
x 1.15
+ VCC
+ -
OV INHIBIT FAULT SOFT START & FAULT LOGIC OC1
DRIVER1
UGATE1 + PHASE1
GATE CONTROL PWM COMP1 PWM1 SYNCH DRIVE
ERROR AMP1 VCC 28A DACOUT
+ -
+ -
VCC
LGATE1 PGND GND
TTL D/A CONVERTER (DAC)
4.5V
FAULT/ RT
SS
FB1
COMP1
VID0 VID1 VID2 VID3 VID4
2
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APW6020
Absolute Maximum Ratings
Symbol VCC VI , VO TA TJ TSTG TS Parameter Supply Voltage Input , Output or I/O Voltage Operating Ambient Temperature Range Junction Temperature Range Storage Temperature Range Soldering Temperature Rating 15 GND -0.3 V to VCC 0 to 70 0 to 125 -65 to +150 300 ,10 seconds Unit V V C C C C
Thermal Characteristics
Symbol R JA Parameter Thermal Resistance in Free Air SOIC SOIC (with 3in2 of Copper) Value 75 65 Unit C/W
Electrical Characteristics
(Recommended operating conditions , Unless otherwise noted) Refer to Block and Simplified Power System Diagrams , and Typical Application Schematic
Symbol VCC Supply Current ICC Nominal Supply Current UGATE1, LGATE1, UGATE2, DRIVE3, and DRIVE4 open Vocset=4.5V Vocset=4.5V Vocset=4.5V Vocset=4.5V 9 mA Parameter Test Conditions APW6020 Min. Typ. Max. Unit
Power-on Reset Rising VCC Threshold Falling VCC Threshold Rising VAUX Threshold VAUX Threshold Hysteresis Rising VOCSET1 Threshold Oscillator 10.4 8.2 2.5 0.5 1.26 185 200 1.9 215 V V V V V kHz VP-P V
FOCS Free Running Frequency RT= Open RT= Open VOSC Ramp Amplitude DAC and Standard Buck Regulator Reference DAC(VID0-VID4) Input Low Voltage
0.8
Copyright ANPEC Electronics Corp. Rev. A.2 - May, 2001
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APW6020
Electrical Characteristics Cont.
Symbol Parameter Test Conditions APW6020 Min. 2.0 -1.0 SELECT<0.8V SELECT>2.0V 1.5 3.3 3 3 1.5 1.8 75 7 40 88 15 6 1 3.5 1 3 115 8.5 200 28 120 230 Typ. Max. V % V V % % V V % % mA dB MHz V/s A A % mA A A % % % 0.8 V Unit
DAC and Standard Buck Regulator Reference DAC(VID0-VID4) Input High Voltage DACOUT Voltage accuracy VREG2 PWM2 Reference Voltage VREG2 PWM2 Reference Voltage PWM2 Reference Voltage Tolerance Linear Regulators (VOUT3 and VOUT4) Regulation (All Linears) VREG3 VSEN3 Regulation Voltage VREG4 VSEN4 Regulation Voltage VSENUV Under-Voltage Level (VSEN/ VREG) Under-Voltage Hysteresis (VSEN/ VREG) Output Drive Current (All Liners) Synchronous PWM Controller Error Amplifier DC Gain GBWP Gain-Bandwidth Product SR Slew Rate PWM Controllers Gate Drivers IUGATE UGATE1,2 Source RUGATE UGATE1,2 Sink ILGATE LGATE1 Source RLGATE LGATE1 Sink Protection VSEN1 Over-Voltage (VSEN1/DACOUT) IOVP FAULT Souring Current IOCSET OCSET1,2 Current Source ISS Soft Start Current Power Good VSEN1 Upper Threshold (VSEN1/DACOUT) VSEN1 Under Voltage (VSEN1/DACOUT) VSEN1 Hysteresis (VSEN1 DACOUT) VPGOOD PGOOD Voltage Low
+1.0
VSEN Rising VSEN Falling VDRIVE =4.0V
20
COMP1=10pF VCC=12V, VUGATE 1,2=6V VUGATE1,2 =1V VCC=12V, VLGATE 1=1V VLGATE1= 1V VSEN1 Rising VFAULT/RT=2.0V VOCSET= 4.5VDC
170
VSEN1 Rising VSEN1 Rising Upper /Lower Threshold IPGOOD= -4mA
108 92 2
110 94
Copyright ANPEC Electronics Corp. Rev. A.2 - May, 2001
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APW6020
Functional Pin Description
UGATE2 (Pin 1) Connect UGATE2 pin to the standard BUCK PWM converter's MOSFET gate. This pin provides the gate drive for the MOSFET. PHASE2 (Pin 2) Connect the PHASE2 pin to the standard BUCK PWM converter's MOSFET source. This pin is used to monitor the voltage drop across the MOSFET for over-current protection. VID0 , VID1 , VID2 , VID3 , VID4 (Pins 7, 6 , 5 , 4 and 3) VID0-4 are the TTL-compatible input pins to the 5-bit DAC. The logic states of these five pins program the internal voltage reference (DACOUT). The level of DACOUT sets the microprocessor core converter output voltage , as well as the coresponding PGOOD and OVP thresholds. PGOOD (Pin 8) PGOOD is an open drain output used to indicate the status of the output voltages. This pin is pulled low when the synchronous regulator output is not within 10% of the DACOUT reference voltage or when any of the other outputs are below their under-voltage thresholds. The PGOOD output is open for `11111' VID code. OCSET2 (Pin 9) Connect a resistor (ROCSET ) from this pin to the drain of the standard BUCK converter's MOSFET. ROCSET , an internal 200A current source (IOCSET ) , and the MOSFET's on-resistance(rDS(ON)) set the converter over-current (OC) trip point according to the following equation : IOCSET * ROCSET rDS(ON) VSEN2 (Pin 10) Connect this pin to the output of the standard Buck PWM converter. The voltage at this pin is regulated to the level predetermined by the logic-level status of the SELECT pin. This pin is also monitored by the PGOOD comparator circuit. SELECT (Pin 11) This pin determines the output voltage of the AGP bus switching regulator. A low TTL input sets the output voltage to 1.5V , while a high input sets the output voltage to 3.3V. SS (Pin 12) Connect a capacitor from this pin to ground. This capacitor , along with an internal 28A current source , sets the soft-start interval of the converter. FAULT / RT (Pin 13) This pin provides oscillator switching frequency adjustment. By placing a resistor (RT ) from this pin to GND , the nominal 200kHz switching frequency is increased. Conversely , connecting a pull-up resistor (RT ) from this pin to VCC reduces the switching frequency. Nominally , the voltage at this pin is 1.26V. In the event of an over-voltage or over-current condition , this pin is internally pulled to VCC. VSEN4 (Pin 14) Connect this pin to the output of the linear 1.8V regulator. This pin is monitored for under-voltage events. DRIVE4 (Pin 15) Connect this pin to the gate of an external MOSFET. This pin provides the drive for the 1.8V regulator's pass transistor. VAUX (Pin 16) An over-current trip cycles the soft-start function. The +3.3V input voltage at this pin is monitored for
Copyright ANPEC Electronics Corp. Rev. A.2 - May, 2001 5 www.anpec.com.tw
I
PEAK
=
APW6020
Functional Pin Description Cont.
power-on reset (POR) purposes. GND (Pin 17) Signal ground for the IC. All voltage levels are measured with respect to this pin. DRIVE3 (Pin 18) Connect this pin to the gate of an external MOSFET. This pin provides the drive for the 1.5V regulator's pass transistor. VSEN3 (Pin 19) Connect this pin to the output of the 1.5V linear regulator. This pin is monitored for under-voltage events. COMP1 and FB1 (Pins 20 , and 21) COMP1 and FB1 are the available external pins of the synchronous PWM regulator error amplifier. The FB1 pin is the inverting input of the error amplifier. Similarly , the COMP1 pin is the error amplifier output. These pins are used to compensate the voltage-mode control feedback loop of the synchronous PWM converter. VSEN1 (Pin 22) This pin is connected to the synchronous PWM converters's output voltage. The PGOOD and OVP comparator circuits use this signal to report output voltage status and for over-voltage protection. OCSET1 (Pin 23) Connect a resistor (ROCSET ) from this pin to the drain of the synchronous PWM converter's upper MOSFET. ROCSET , an internal 200A current source (IOCSET ) , and the MOSFET's on-resistance(rDS(ON)) set the converter over-current (OC) trip point according to the following equation : IOCSET * ROCSET rDS(ON)
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An over-current trip cycles the soft-start function. The voltage at OCSET1 pin is monitored for power-on reset (POR) purposes. PGND (Pin 24) This is the power ground connection. Tie the synchronous PWM converter's lower MOSFET source to this pin. LGATE1 (Pin 25) Connect LGATE1 to the synchronous PWM converter's lower MOSFET gate. This pin provides the gate drive for the lower MOSFET. PHASE1 (Pin 26) Connect the PHASE1 pin to the synchronous PWM converter's upper MOSFET source. This pin is used to monitor the voltage drop across the upper MOSFET for over-current protection. UGATE1 (Pin 27) Connect UGATE1 pin to the synchronous PWM converter's upper MOSFET gate. This pin provides the gate drive for the upper MOSFET. VCC (Pin 28) Provide a 12V bias supply for the IC to this pin. This pin also provides the gate bias charge for all the MOSFETs controlled by the IC. The voltage at this pin is monitored for Power-On Reset (POR) purposes.
I
PEAK
=
Copyright ANPEC Electronics Corp. Rev. A.2 - May, 2001
APW6020
Table1 Output Voltage Program
Pin Name
VID4 VID3 VID2 VID1 VID0 Nominal DACOUT Voltage
Pin Name
VID4 VID3 VID2 VID1 VID0
Nominal DACOUT Voltage
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0
1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1.30 1.35 1.40 1.45 1.50 1.55 1.60 1.65 1.70 1.75 1.80 1.85 1.90 1.95 2.00 2.05
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0
1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5
NOTE : 0 = connected to GND , 1 = open or connected to 5V through pull-up resistors
Simplified Power System Diagram
+5VIN
Q3 VOUT2
Standard Buck PWM Controller
Synchronous PWM Controller
Q1 VOUT1 Q2
APW6020
+3.3VIN Q4 VOUT3 Linear Controller Linear Controller Q5 VOUT4
Copyright ANPEC Electronics Corp. Rev. A.2 - May, 2001
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APW6020
Typical Characteristics
+12VIN +5VIN LIN
1H
CIN
3000F
C4
1000pF
C1
1F
C3
1000pF
VCC
ROCSET2
OCSET2
OCSET1 PGOOD
ROCSET1
C2
1F
POWERGOOD LOUT2
6.2H
Q3
UGATE2 UGATE1 PHASE2 PHASE1
Q1
LOUT1
4.2H
VOUT2 1.5V or 3.3V COUT2
3000F
VOUT1 1.3V to 3.5V Q2 R4
10.2K
CR1
VSEN2 SELECT
LGATE1 PGND VSEN1
COUT1
8000F
TYPEDET +3.3VIN Q4 VOUT3 1.5V COUT3
1000F
VAUX DRIVE3 VSEN3
APW6020
FB1
C5
10pF
COMP1
R1
1.62K
C7
0.22F
Q5
DRIVE4 VSEN4 SS
C6
FAULT/RT VID0 VID1
2.7nF
R2
150K
VOUT4 1.8V COUT4
1000F
R3
499K
VID2
VID3 VID4
CSS
0.1F
GND
Typical Characteristics
10000
1000
RT ( k )
100
to +12V RT pull up RT pull down to GND
10
1 50 150 250 350 450 550 650 750
Switching Frequency ( kHz )
Copyright ANPEC Electronics Corp. Rev. A.2 - May, 2001
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APW6020
Typical Characteristics Cont.
1.0% 1.0%
0.6%
VOUT2 Reference Voltage deviation (%)
0 10 20 30 40 50 60 70 80 90 100
0.8%
0.8% 0.6% 0.4% 0.2% 0.0% -0.2% -0.4% -0.6% -0.8% -1.0% 0 10 20 30 40 50 60 70 80 90 100
DACOUT Voltage deviation (%)
0.4% 0.2% 0.0% -0.2% -0.4% -0.6% -0.8% -1.0%
Junction Temperature (oC)
Junction Temperature (oC)
1.0%
1.0%
VOUT3 Reference Voltage deviation (%)
0.8% 0.6% 0.4% 0.2% 0.0% -0.2% -0.4% -0.6% -0.8% -1.0% 0 10 20 30 40 50 60 70 80 90 100
VOUT4 Reference Voltage deviation (%)
0.8% 0.6% 0.4% 0.2% 0.0% -0.2% -0.4% -0.6% -0.8% -1.0% 0 10 20 30 40 50 60 70 80 90 100
Junction Temperature (oC)
Junction Temperature (oC)
VREF(TJ ) - VREF(25 oC) VREF (25oC)
Note : The Referance Voltage(VREF ) Deviation is
x 100%
TJ : Junction Temperature
Copyright ANPEC Electronics Corp. Rev. A.2 - May, 2001 9 www.anpec.com.tw
APW6020
Package Information
SO - 300mil ( Reference JEDEC Registration MS-013)
D N
H
E
GAUGE PLANE
123 A e B A1 L
1
Millimeters Dim A A1 B D E e H L N 1 Min. 2.35 0.10 0.33 Max. 2.65 0.30 0.51
Variations- D Variations SO-16 SO-18 SO-20 SO-24 SO-28 SO-14 Min. 10.10 11.35 12.60 15.20 17.70 8.80 Max. 10.50 11.76 13 15.60 18.11 9.20 Dim A A1 B D E e H L N 1
Inches Min. 0.093 0.004 0.013 Max. 0.1043 0.0120 0.020
Variations- D Variations SO-16 SO-18 SO-20 SO-24 SO-28 SO-14 Min. 0.398 0.447 0.496 0.599 0.697 0.347 Max. 0.413 0.463 0.512 0.614 0.713 0.362
See variations 7.40 7.60
See variations 0.2914 0.2992
1.27BSC 10 0.40 10.65 1.27
0.050BSC 0.394 0.016 0.419 0.050
See variations 0 8
See variations 0 8
Copyright ANPEC Electronics Corp. Rev. A.2 - May, 2001
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APW6020
Physical Specifications
Terminal Material Lead Solderability Packaging Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb) Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3. 1000 devices per reel
Refolw Condition (IR/ Convection or VPR Reflow)
Reference JEDEC Standard J-STD-020A APRIL 1999
temperature Peak temperature
183C Pre-heat temperature
Time
Classification Reflow Profiles
Convection or IR/ Convection VPR 3C/second max. 10 C /second max. 120 seconds max. 60 ~ 150 seconds 10 ~ 20 seconds 220 +5/-0C or 235 +5/-0C 6 C /second max. 6 minutes max. 60 seconds 215~ 219C or 235 +5/-0C 10 C /second max.
Average ramp-up rate(183C to Peak) Preheat temperature 125 25C) Temperature maintained above 183C Time within 5C of actual peak temperature Peak temperature range Ramp-down rate Time 25C to peak temperature
Package Reflow Conditions
pkg. thickness 2.5mm and all bags Convection 220 +5/-0 C VPR 215-219 C IR/Convection 220 +5/-0 C pkg. thickness < 2.5mm and pkg. volume 350 mm pkg. thickness < 2.5mm and pkg. volume < 350mm Convection 235 +5/-0 C VPR 235 +5/-0 C IR/Convection 235 +5/-0 C
Copyright ANPEC Electronics Corp. Rev. A.2 - May, 2001
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APW6020
Reliability test program
Test item SOLDERABILITY HOLT PCT TST ESD Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B, A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD 78 Description 245C , 5 SEC 1000 Hrs Bias @ 125 C 168 Hrs, 100 % RH , 121C -65C ~ 150C, 200 Cycles VHBM > 2KV, VMM > 200V 10ms , Itr > 100mA
Tape & Reel Dimensions
t Po P P1 D
E
F W
Bo
Ao
Ko D1 T2
J C A B
T1
Application SOP- 28 Application SOP- 28
A 3301 F
B 62 1.5 D
C 12.75 0. 5 D1 1.5+ 0.25
J 2 0.6 Po 4.0 0.1
T1 24.4 0.2 P1
T2 2 0.2 Ao
W 24 0.3 Bo
P 12 0.1 Ko
E 1.75 0.1 t
11.5 0.1 1.5 +0.1
2.0 0.1 10.85 0.1 18.34 0.1 2.97 0.1 0.350.01
Copyright ANPEC Electronics Corp. Rev. A.2 - May, 2001
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APW6020
Cover Tape Dimensions
Carrier Width Cover Tape Width 24 21.3
Customer Service
Anpec Electronics Corp. Head Office : 5F, No. 2 Li-Hsin Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 7F, No. 137, Lane 235, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : 886-2-89191368 Fax : 886-2-89191369
Copyright ANPEC Electronics Corp. Rev. A.2 - May, 2001
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